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Best paper award nomination at LADC
The paper entitled “ Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, authored by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz, has been nominated to best paper at LADC 2018. Congratulations!!!
Paper accepted at LADC (II)
The paper entitled “ Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, authored by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz, has been accepted at LADC 2018. Abstract: Simulation-based fault injection is an indispensable technique to assess the robustness of hardware components defined by means of hardware description languages (HDL). [...]
Paper accepted at LADC (I)
The paper entitled “Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes”, authored by J. Gracia-Moran, L.J. Saiz-Adalid, J.C. Baraza-Calvo and P.J. Gil-Vicente, has been accepted at LADC 2018. Abstract: The continuous growth of the integration scale in CMOS circuits has derived in an increase in the memory systems capacity, but also in [...]
Presentation at DSN 2018
Our PhD student, Ilya Tuzov, has presented the work “DAVOS: EDA toolkit for dependability assessment, verification, optimisation and selection of hardware models” at DSN 2018, that is being celebrating in Luxembourg.
Paper accepted at DSN 2018
The paper ” DAVOS: EDA toolkit for dependability assessment, verification, optimisation and selection of hardware models” written by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz has been accepted at DSN 2018, that will be held next June in Luxembourg City, Luxembourg. More info at: https://dsn2018.uni.lu/