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Presentation at EDCC 2019
Juan Carlos Ruiz has presented the paper entitled “Robustness-aware design space exploration by iteratively augmenting and repairing D-optimal designs”, written by Ilya Tuzov, David De Andrés and Juan Carlos Ruiz. Abstract: Design space exploration (DSE) is nowadays of utmost importance to implement HW designs with acceptable levels of performance, power consumption, area and dependability (PPAD). [...]
Paper accepted at EDCC 2019
The paper entitled “Robustness-aware design space exploration through iterative refinement of D-optimal designs”, written by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz has been accepted at EDCC 2019. Abstract: Design space exploration (DSE) is nowadays of utmost importance to implement HW designs with acceptable levels of performance, power consumption, area and dependability (PPAD). Electronic [...]
LADC 2018 Best Paper Award
The paper entitled “Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, written Ilya Tuzov, David de Andres and Juan Carlos Ruiz has been awarded as Best Paper in LADC 2018. Congratulations!!
LADC 2018 Presentation (II)
Luis J. Saiz has presented at LADC 2018 the paper entitled “Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes” written by Joaquin Gracia-Moran, Luis-J. Saiz-Adalid, Juan-Carlos Baraza-Calvo and Pedro Gil-Vicente.
LADC 2018 Presentation (I)
Juan Carlos Ruiz has presented at LADC 2018 the best paper candidate entitled “Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, written Ilya Tuzov, David de Andres and Juan Carlos Ruiz.
Presentation at EDCC 2018
David de Andrés has presented the paper entitled “Accurate Robustness Assessment of HDL Models through Iterative Statistical Fault Injection” at EDCC 2018. This work has been selected as one of the “Distinguished Papers”. Congratulations!!
Best paper award nomination at LADC
The paper entitled “ Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, authored by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz, has been nominated to best paper at LADC 2018. Congratulations!!!
Paper accepted at LADC (II)
The paper entitled “ Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, authored by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz, has been accepted at LADC 2018. Abstract: Simulation-based fault injection is an indispensable technique to assess the robustness of hardware components defined by means of hardware description languages (HDL). [...]
Paper accepted at LADC (I)
The paper entitled “Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes”, authored by J. Gracia-Moran, L.J. Saiz-Adalid, J.C. Baraza-Calvo and P.J. Gil-Vicente, has been accepted at LADC 2018. Abstract: The continuous growth of the integration scale in CMOS circuits has derived in an increase in the memory systems capacity, but also in [...]
Presentation at DSN 2018
Our PhD student, Ilya Tuzov, has presented the work “DAVOS: EDA toolkit for dependability assessment, verification, optimisation and selection of hardware models” at DSN 2018, that is being celebrating in Luxembourg.