Presentation at DSN 2018
Our PhD student, Ilya Tuzov, has presented the work “DAVOS: EDA toolkit for dependability assessment, verification, optimisation and selection of hardware models” at DSN 2018, that is being celebrating in Luxembourg.
Paper accepted at Jornadas SARTECO 2018
The paper entitled “Un nuevo Código de Corrección de Errores matricial con baja redundancia” written by J. Gracia-Morán, L.J. Saiz-Adalid, D. Gil-Tomás and P.J. Gil-Vicente has been accepted in the Jornadas SARTECO 2018. The abstract of this work says: Actualmente, y debido al continuo aumento en la escala de integración, la tasa de fallos en [...]
Paper accepted at IEEE Transactions on VLSI
The paper entitled “Improving Error Correction Codes for Multiple-Cell Upsets in Space Applications”, written by Joaquín Gracia-Morán, Luis J. Saiz-Adalid, Daniel Gil-Tomás, and Pedro J. Gil-Vicente has been accepted at the IEEE Transactions on VLSI. Abstract: Currently, faults suffered by SRAM memory systems have increased due to the aggressive CMOS integration density. Thus, the probability [...]
Seminar: “FPGA-based fault injection”
Next Thursday 31/05/2018 at 12h30, researcher Jose Luis Nunes (University of Coimbra) will provide a talk describing his research on FPGA-based Fault Injection. Find here after the information concerning this seminar: Title: FPGA-based Fault Injection Summary: Reconfigurable embedded devices built on SRAM-based Field Programmable Gate Arrays (FPGA) are being increasingly used in critical embedded applications. [...]
Seminar at LAAS
This week, Juan Carlos Ruiz has been teaching the entitled seminar “Statistical Fault Injection: When is it enough in robustness assessment?” “Simulation-based fault injection is commonly used to assess the robustness of hardware components modelled using Hardware Description Languages (HDL). The current complexity of modern circuits usually makes not feasible the consideration during experimentation of all [...]
Exhibition at Universitat Politènica de València
Our group has shown some of our latest research to the future students of the Master’s Degree in Computer and Network Engineering. More info: https://www.upv.es/titulaciones/MUIC/index-en.html
Paper accepted at DSN 2018
The paper ” DAVOS: EDA toolkit for dependability assessment, verification, optimisation and selection of hardware models” written by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz has been accepted at DSN 2018, that will be held next June in Luxembourg City, Luxembourg. More info at: https://dsn2018.uni.lu/
Visit of Jean Carles Fabre
Professor Jean Charles Fabre will visit us during the days 12-15 March, 2018. He will give the seminar entitled “Dependable Embedded Systems: from basic concepts and techniques to resilient computing”, with next agenda: 12th of March: 11h-13h. Basic concepts of dependable computing. 13th of March: 09h-11h. Fault tolerant computing. 14th of March: 10h-13h. Experimental validation [...]
LX Encuentro CPI ¿Qué hacer para proteger mi empresa frente a ataques informáticos? – Ciberseguridad en la empresa
Juan Carlos Ruiz has participated in the “LX Encuentro CPI ¿Qué hacer para proteger mi empresa frente a ataques informáticos? – Ciberseguridad en la empresa” in the panel “Casos de éxito de aplicación de Ciberseguridad en la UPV”. More info at: https://innovacion.upv.es/es/agenda/lx-encuentro-cpi-que-hacer-para-proteger-mi-empresa-frente-a-ataques-informaticos-ciberseguridad-en-la-empresa/
LX Encuentro CPI ¿Qué hacer para proteger mi empresa frente a ataques informáticos? – Ciberseguridad en la empresa
Pedro Gil has participated in the “LX Encuentro CPI ¿Qué hacer para proteger mi empresa frente a ataques informáticos? – Ciberseguridad en la empresa” in the panel “Casos de éxito de aplicación de Ciberseguridad en la UPV”. More info at: https://innovacion.upv.es/es/agenda/lx-encuentro-cpi-que-hacer-para-proteger-mi-empresa-frente-a-ataques-informaticos-ciberseguridad-en-la-empresa/