Home » Seminar

Category Archives: Seminar

PhD Sobresaliente Cum Laude

The PhD work entitled ““Improving the process of analysis and comparison of results in dependability benchmarking for computer systems”, developed by Miquel Martínez Raga, and directed by David de Andres and Juan Carlos Ruiz has been awarded with a claification of Sobresaliente Cum Laude. Congratulations!!

Continue Reading →

PhD Defense

Our PhD student, Miquel Martínez Raga, has succesfully defended his thesis entitled “Improving the process of analysis and comparison of results in dependability benchmarking for computer systems”. Congratulations!!

Continue Reading →

Seminar INSA Ecole Été 2018 in CyberPhysical Systems

On July, 18th, Juan Carlos Ruiz has participated in the Summer School CPS 2018. His talk was titled “Design and Verification of Safe and Secure VLSI Systems”. Abstract: Current embedded VLSI systems are widespread and operate in multitude of applications in different markets, ranging from life support, industrial control, or avionics to consumer electronics. It [...]

Continue Reading →

Seminar: “FPGA-based fault injection”

Next Thursday 31/05/2018 at 12h30, researcher Jose Luis Nunes (University of Coimbra) will provide a talk describing his research on FPGA-based Fault Injection. Find here after the information concerning this seminar: Title: FPGA-based Fault Injection Summary: Reconfigurable embedded devices built on SRAM-based Field Programmable Gate Arrays (FPGA) are being increasingly used in critical embedded applications. [...]

Continue Reading →

Seminar at LAAS

This week, Juan Carlos Ruiz has been teaching the entitled seminar “Statistical Fault Injection: When is it enough in robustness assessment?” “Simulation-based fault injection is commonly used to assess the robustness of hardware components modelled using Hardware Description Languages (HDL). The current complexity of modern circuits usually makes not feasible the consideration during experimentation of all [...]

Continue Reading →