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Paper accepted at WIICT 2018
The paper entitled «A comparison of two different matrix Error Correction Codes» written by J. Gracia-Morán, L.J. Saiz-Adalid, D. Gil-Tomás and P.J. Gil-Vicente has been accepted in the Workshop on Innovation on Information and Communication Technologies (ITACA-WIICT 2018) Abstract: Due to the continuous increment in the integration scale, the fault rate in computer memory systems [...]
Paper accepted at Jornadas SARTECO 2018
The paper entitled «Un nuevo Código de Corrección de Errores matricial con baja redundancia» written by J. Gracia-Morán, L.J. Saiz-Adalid, D. Gil-Tomás and P.J. Gil-Vicente has been accepted in the Jornadas SARTECO 2018. The abstract of this work says: Actualmente, y debido al continuo aumento en la escala de integración, la tasa de fallos en [...]
WIICT 2017
It’s available the paper «New configurations to improve reliability and redundancy in high performance memory systems», published in the Proceedings of the Workshop on Innovation on Information and Communication Technologies (WIICT 2017). Proceedigns available at: http://www.sabien.upv.es/event/itaca-wiict2017/WIICT2017.pdf