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Yearly Archives: 2018
Best paper award nomination at LADC
The paper entitled “ Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, authored by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz, has been nominated to best paper at LADC 2018. Congratulations!!!
Paper accepted at LADC (II)
The paper entitled “ Speeding-up robustness assessment of HDL models through profiling and multi-level fault injection”, authored by Ilya Tuzov, David de Andrés and Juan-Carlos Ruiz, has been accepted at LADC 2018. Abstract: Simulation-based fault injection is an indispensable technique to assess the robustness of hardware components defined by means of hardware description languages (HDL). [...]
Paper accepted at LADC (I)
The paper entitled “Correction of Adjacent Errors with Low Redundant Matrix Error Correction Codes”, authored by J. Gracia-Moran, L.J. Saiz-Adalid, J.C. Baraza-Calvo and P.J. Gil-Vicente, has been accepted at LADC 2018. Abstract: The continuous growth of the integration scale in CMOS circuits has derived in an increase in the memory systems capacity, but also in [...]
Seminar INSA Ecole Été 2018 in CyberPhysical Systems
On July, 18th, Juan Carlos Ruiz has participated in the Summer School CPS 2018. His talk was titled “Design and Verification of Safe and Secure VLSI Systems”. Abstract: Current embedded VLSI systems are widespread and operate in multitude of applications in different markets, ranging from life support, industrial control, or avionics to consumer electronics. It [...]
Paper accepted at WIICT 2018 (III)
The paper entitled “Towards dependability-aware design space exploration using genetic algorithms” written by Quentin Fabry, Ilya Tuzov, Juan-Carlos Ruiz and David de Andrés has been accepted in the Workshop on Innovation on Information and Communication Technologies (ITACA-WIICT 2018) Abstract: The development of complex digital systems poses some design optimization problems that are today automatically addressed [...]
Paper accepted at WIICT 2018 (II)
The paper entitled “Energy-aware Design Space Exploration for Optimal Implementation Parameters Tuning” written by Ilya Tuzov, David de Andrés and Juan Carlos Ruiz has been accepted in the Workshop on Innovation on Information and Communication Technologies (ITACA-WIICT 2018) Abstract: Determining the optimum configuration of semicustom implementation tools to simultaneously optimize the energy consumption, maximum clock [...]
Paper accepted at WIICT 2018
The paper entitled “A comparison of two different matrix Error Correction Codes” written by J. Gracia-Morán, L.J. Saiz-Adalid, D. Gil-Tomás and P.J. Gil-Vicente has been accepted in the Workshop on Innovation on Information and Communication Technologies (ITACA-WIICT 2018) Abstract: Due to the continuous increment in the integration scale, the fault rate in computer memory systems [...]
Visit from Nepal
Professor Dr. Dinesh Kumar Sharma, Professor Dr. Subarna Shakya and Professor Dr. Tri Ratna Bajracharya from the Tribhuvan University in Nepal has visited us today.
Presentation at DSN 2018
Our PhD student, Ilya Tuzov, has presented the work “DAVOS: EDA toolkit for dependability assessment, verification, optimisation and selection of hardware models” at DSN 2018, that is being celebrating in Luxembourg.
Paper accepted at Jornadas SARTECO 2018
The paper entitled “Un nuevo Código de Corrección de Errores matricial con baja redundancia” written by J. Gracia-Morán, L.J. Saiz-Adalid, D. Gil-Tomás and P.J. Gil-Vicente has been accepted in the Jornadas SARTECO 2018. The abstract of this work says: Actualmente, y debido al continuo aumento en la escala de integración, la tasa de fallos en [...]